IPM-LDPC
LDPC Encoder/Decoder IP Core
Overview
Nand Flash write cycles are limited. An ECC detects and corrects failed operations, increasing the lifetime of the Nand Flash memory. For Nand Flash-based data storage, using an ECC is mandatory to ensure data validity. IP-Maker’s powerful IPM-LDPC is based on the LDPC algorithm. The IP-Maker IPM-LDPC Encoder/Decoder is full-featured with multiple parameters to fit your own needs in FPGA and SoC designs.
In fact IPM-LDPC Encoder/Decoder is fully configurable, allowing to it reach the best latency or the smallest footprint.
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IPM-LDPC for NandFlash Storage
- Adaptable BER
- Up to 6 checks per bit
- customizable data path
- IPM-LDPC for short code
- option to be full asynchronous
- option to be in 3 clock cycles
- fully configurable
- matrix generator
- data path
- number of iteration checks
- packet size
- Full hardware implementation for maximum performance, encoding, error detection and correct
- Balanced performance/gatecount
- generator matrix customizable to fit exactly your needs
- Validated IP reducesTime-To-Market
For design that uses shorter packets and codes, a subset of our prevalidated and improved IPM-LDPC is available to protect your private datas.
